The present invention relates to data interfaces in general, and high-speed single-ended interfaces in particular.
There are various types of signaling schemes that may be used by data interfaces that transmit and receive data. For example, data interfaces may use single-ended, differential, or other types of signaling schemes.
Differential signals require two separate signal components, each on a separate conductor, such as an integrated circuit or printed-circuit (PC) board trace. Typically, signals on each of these conductors switch in opposition to each other, for example, one signal component may transition from high to low when the other transitions from low to high. Each signal component in a differential signal pair is generated by a separate driver stage and is received by a separate receive stage.
Single-ended signals require only one signal and therefore one conductor, saving on the number of wires and their required area on a chip or PC board as compared to differential signaling. Often, single-ended signals switch in opposition to a reference voltage. This reference voltage can be shared between several single ended signals, again saving on the number of conductors. A single ended signal requires only one driver stage and one receive stage. Thus, using single ended signaling saves on the number of drivers and receives needed, and correspondingly saves power. When single-ended signals are used to transmit data from one integrated circuit to another, the reduction in the number of conductors needed means that only half the number of integrated circuit package pins are needed as compared to differential signals.
For these reasons, it is desirable to use single ended signals when transmitting data, particularly from one integrated circuit to another. But several factors can conspire to corrupt a single-ended signal and cause errors in data transmission.
These noise factors such as simultaneous switching noise (SSN), inter symbol interference (ISI), ground bounce, coupling, crosstalk, package contacts, board via and transmission line effect and other similar factors can be generally grouped into those that cause skew between signals and those that cause jitter on a signal. Skew between signals can be caused by mismatches in circuits that generate the signals, for example, one driver may provide more current than another driver. Skew can also result from mismatches in loading such as mismatches between trace lines, bond wires, lead frame lengths and inductances, parasitic capacitance mismatches, and the like. Jitter on a signal can be caused by noise, intersymbol interference (ISI), and other phenomena.
Skew and jitter are particularly destructive in a synchronous (clocked) interface that includes several parallel data channels. For optimal data transfer, the synchronizing clock signal should be aligned to the center of each bit of data in each of the received data signals. But skew and jitter move signals in time relative to each other and to the synchronizing clock signal. This makes accurate data reception at the receiving end difficult and error prone. In high-speed interface circuits, this is more pronounced since each data bit is shorter, the same amount of skew and jitter lead to more transmission errors.
Thus, what is needed are circuit, methods, and apparatus for high-speed single-ended data transfers from one integrated circuit to another that can compensate for various noise effects and related skew and jitter effects on between signals. It is also desirable to compensate for the jitter on a signal.